Physical Design Engineer

Company: Qualcomm India Private Limited

Job Area: Engineering Group, Engineering Group > ASICS Engineering

As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next-generation experiences and drives communication and data processing transformation to help create a smarter, connected future for all. As a Qualcomm ASIC Engineer, you will define, model, design (digital and/or analog), optimize, verify, validate, implement, and document IP (block/SoC) development for a variety of high performance, high quality, low power world class products. Qualcomm Engineers collaborate with cross-functional groups to determine product execution path.

• Bachelor's degree in Science, Engineering, or related field.

• PNR implementation for Qualcomm SoC's
• Good hands-on experience on Floorplanning, PNR and STA flows
• Good knowledge on Placement/Clock Tree Synthesis (CTS), optimization, etc
• Good understanding on signoff domains LEC/CLP/PDN knowledge, etc
• Good knowledge on Unix/Linux Perl/TCL fundamentals/scripting
• Complete ownership on PNR implementation (Floorplanning, Placement, CTS, post_route, etc) on latest nodes.
• Signoff knowledge is mandatory (STA, Power analysis, FV, low power verification, PV, etc)
• Quick learner with good analytical and problem-solving skills

• 2+ years Hardware Engineering experience or related work experience.
• 2+ years' experience with PNR flow in latest tech nodes (e.g., 4nm/5nm/7nm/10nm)

Applicants: Qualcomm is an equal opportunity employer. If you are an individual with a disability and need an accommodation during the application/hiring process, Qualcomm is committed to providing an accessible process. You may contact Qualcomm Careers for more information.

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If you would like more information about this role, please contact Qualcomm Careers.