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    Job · 22086103

    JO

    Technical Lead Embedded Systems & PCIe

    jobmate.org · Bengaluru · onsite · Posted 6d ago

    Not disclosed8–14 yrsfulltimeSourced fromFoundit

    About a minute. You'll make an account on the way through.

    About this role

    Location – Bangalore / Pune / Kolkata / Indore

    We are looking for a hands-on Technical Lead / Architect to drive PCIe and CXL engineering for AI infrastructure: accelerators, NVMe SSDs, retimers, PCIe switches and AI server platforms. You will own host-side drivers or device-side firmware, link bring-up, debug and validation on customer programs, write and debug code yourself, and lead a team of engineers.

    Key Responsibilities

    • Develop and debug PCIe/CXL host drivers in the Linux kernel, or device-side endpoint firmware (bare-metal or RTOS on ARM/RISC-V cores).
    • Bring up PCIe Gen5/Gen6 links on new platforms: link training (LTSSM), equalization, enumeration, BAR and resource allocation, MSI-X and DMA.
    • Root-cause link, error (AER/DPC), hot-plug and performance issues across hardware, firmware and OS layers.
    • Build and run PCIe/CXL validation: compliance, interoperability, stress, error injection and telemetry, automated in Python.
    • Integrate accelerators, NVMe SSDs, SmartNICs/DPUs, PCIe switches and retimers into AI server platforms.
    • Work directly with customer silicon, hardware and validation teams; lead design reviews and technical customer discussions.
    • Own technical delivery for the team and mentor engineers.

    Qualifications

    Education

    • Bachelor's or master's degree in computer engineering or computer science, Electronics, Electrical, (or equivalent experience).

    Experience

    • 8 to 14 years in embedded systems software.
    • At least 4 years of hands-on PCIe work on a shipped product or silicon program.

    Must-Have Technical Skills

    • Strong C programming, with hands-on coding.
    • PCIe protocol depth: TLP/DLLP, LTSSM, configuration space, BARs, MSI/MSI-X, AER.
    • Either Linux kernel PCIe driver development or firmware development for a PCIe device/endpoint.
    • Lab debug with PCIe protocol analyzers/exercisers, JTAG, and kernel or firmware traces.
    • Python for test automation.

    Good-to-Have Technical Skills

    • CXL 2.0/3.x (CXL.io, CXL.mem), memory expansion and pooling.
    • PCIe Gen6 (PAM4, FLIT mode), retimers and PCIe switches.
    • NVMe, SR-IOV, IOMMU/ATS, peer-to-peer DMA, GPUDirect.
    • Server platform PCIe: UEFI/BIOS initialization, ACPI, BMC/OpenBMC.
    • PCI-SIG or CXL compliance testing.
    • GPU or custom AI accelerator integration.

    Sourced from foundit

    Skills

    PCIe Protocol Analyzerskernel or firmware tracesLinux kernel PCIe driver developmentc programmingJTAGPCIe protocolExercisersPython for test automation

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