Senior Director , Engineering (GPU Physical Design)

Company

Qualcomm India Private Limited

Job Area

Engineering Group, Engineering Group > ASICS Engineering

General Summary

Role Overview:

We are looking for an accomplished Senior Director – GPU Physical Design to provide technical and organizational leadership for the physical implementation of highly complex, high-performance GPU designs.

The ideal candidate will bring 25+ years of semiconductor/VLSI experience, with extensive expertise in leading complex physical design programs from architecture and planning through implementation, timing closure, physical verification, and tape-out. This role requires a strong combination of deep technical expertise, large-scale program execution, and senior-level leadership.

Minimum Qualifications

• Bachelor's degree in Science, Engineering, or related field and 8+ years of ASIC design, verification, validation, integration, or related work experience.
  
  

OR

Master's degree in Science, Engineering, or related field and 7+ years of ASIC design, verification, validation, integration, or related work experience.

OR

PhD in Science, Engineering, or related field and 6+ years of ASIC design, verification, validation, integration, or related work experience.

Key Responsibilities

• Lead the end-to-end physical design strategy and execution for highly complex GPU designs and subsystems.
• Drive implementation across floorplanning, partitioning, placement, clock-tree design, routing, timing closure, power integrity, physical verification, and tape-out.
• Provide technical direction for designs with challenging frequency, power, performance, area, congestion, and timing requirements.
• Lead execution and technical decision-making for large, highly complex GPU/SoC projects, identifying design risks early and driving them to closure.
• Drive PPA optimization across architecture, RTL, synthesis, implementation, timing, and sign-off stages.
• Partner closely with GPU architecture, RTL/design, verification, DFT, power, methodology, CAD and silicon engineering teams to achieve product goals.
• Establish scalable physical-design methodologies and execution strategies for increasingly complex designs and advanced semiconductor process technologies.
• Lead technical reviews and provide guidance on critical issues involving timing convergence, floorplan feasibility, power delivery, clocking, congestion, signal integrity and design closure.
• Build and develop a strong Physical Design organization, including senior technical leaders, managers and engineering teams.
• Mentor technical leaders and drive a culture of engineering excellence, ownership, innovation and predictable execution.
• Work with executive and cross-functional leadership on technology strategy, roadmap planning, resource requirements, program risks and execution priorities.
  
  

Required Qualifications

• 25+ years of experience in VLSI/ASIC/SoC Physical Design with strong technical leadership.
• Proven expertise in leading highly complex GPU/CPU/SoC designs from implementation through tape-out.
• Deep knowledge of floorplanning, P&R, STA/timing closure, clocking, PPA optimization, power integrity and sign-off.
• Strong experience with advanced process nodes and large-scale, high-performance designs.
• Demonstrated ability to lead large engineering teams and complex cross-functional programs.
• B.E./B.Tech/M.E./M.Tech/MS or equivalent in Electrical/Electronics/Computer Engineering.
  
  

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