RTL Design Engineer -Security /Staff

Company:

Qualcomm India Private Limited

Job Area:

Engineering Group, Engineering Group > ASICS Engineering

General Summary:

Key Responsibilities

• Develop micro-architecture and RTL design for Cores related to security. Responsible for block level design.
• Micro architecture and enabling SW teams to use HW blocks.
• Running ASIC development tools including Lint and CDC.
• Report status and communicate progress against expectations.
  
  

Minimum Qualifications

• Bachelor's degree in Engineering, Information Systems, Computer Science, or related field.
• 2+ years Hardware Engineering experience or related work experience.
  
  

Preferred Qualifications

• 8 to 11 years of work experience in ASIC/SoC Design
• Experienced in RTL design using Verilog / System Verilog.
• Knowledge of cryptography, public/private key, hash functions, random number generator, encryption/signatures algorithms (AES, SHA, GMAC, etc.) will be a plus.
• Experienced in Linting, CDC and LEC.
• Experienced in database management flows with Clearcase/Clearquest.
• Ability to program effectively in Verilog, C/C++, Python, Perl
• Excellent oral and written communications skills
• Proactive, creative, curious, motivated to learn and contribute with good collaboration skills..
  
  

ngineering Preferred: Master's, Electrical Engineering

Minimum Qualifications:

• Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 4+ years of Hardware Engineering or related work experience.
  
  

OR

Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 3+ years of Hardware Engineering or related work experience.

OR

PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience.

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