Formal Verification CAD Engineer
Qualcomm · Bengaluru · onsite · Posted 7d ago
Undisclosed2–7 yrsfulltimeSourced from
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About this role
Job Area
Job Summary
What You Will Be Doing
What We Need to See
Minimum Qualifications
Engineering Group, Hardware Engineering
Job Summary
We are seeking a highly motivated Formal Verification Engineer with 2+ years of experience to join our GCAD Formal team. The ideal candidate will have strong formal verification fundamentals, hands-on experience with formal tools, excellent analytical and scripting skills, and the ability to drive innovative verification methodologies. This role provides the opportunity to collaborate across global architecture, design, and systems teams to influence and strengthen verification signoff quality.
What You Will Be Doing
- Drive formal verification of complex design blocks using advanced Formal Apps and robust convergence strategies to achieve exhaustive and highconfidence signoff.
- Collaborate with worldwide architecture, design, and systems teams to achieve verification goals.
- Review and refine formal setups, proofs, constraints, and abstractions with design/DV teams.
- Engage with EDA vendors and evaluate advanced DV methodologies to improve signoff quality.
- Develop automation scripts (Python preferred) to enhance efficiency and scalability of FV flows.
- Analyze challenging formal problems and propose effective verification strategies.
- Low power formal methodology
What We Need to See
- 2+ years of hands-on experience in Formal Verification.
- Strong understanding of formal concepts, proof strategies, and abstraction techniques.
- Proficiency with formal tools (Jasper, VC Formal, Questa Formal, etc.).
- Working knowledge of property-based FV (SVA ) is a plus.
- Excellent scripting skills (Python strongly preferred).
- Strong analytical and problemsolving abilities.
- Clear communication skills and ability to collaborate with global teams.
- A strong willingness to learn, innovate, and deliver highquality results.
- Lowpower knowledge is a plus(e.g., poweraware verification concepts, UPF/CPF, isolation/retention, power/clock gating, poweraware apps, and basic powerintent debugging).
Minimum Qualifications
Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field.
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Skills
AutomationScriptingformal verificationHardware EngineeringCADElectronics EngineeringEvent DrivendebuggingPythonCommunication SkillsArchitectureRest Assured
About Qualcomm
Qualcomm
Semiconductors
22k+
employees
1996
30 years old
San Diego,California
United States
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