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    Job · 21049864

    BENGALURU · FULLTIME

    Design Verification Lead

    PR

    prajnov

    Bengaluru · onsite · Posted 8d ago

    Sourced fromFoundit
    Not disclosedFresherfulltimeBengaluru

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    Section · 01

    About this role

    Title: Design Verification Lead

    We are looking for an experienced Design Verification professional with strong hands-on expertise in SystemVerilog & UVM to join our team.

    Key Skills:

    • Strong SystemVerilog & UVM experience on live projects

    • Expertise in AMBA protocols & ARM CPU

    • Functional verification using Monitors, Checkers, Scoreboards & Assertions

    • Constrained-random verification & functional coverage

    • Strong debugging & problem-solving skills

    • Unix/Linux and verification tools for configuration management, bug tracking & dashboards

    • Scripting: Python / Perl / Shell / Makefile

    • PCIe / Ethernet experience is an added advantage

    • Strong communication, teamwork and ability to work independently

    Locations: Kochi | Chennai | Bangalore | Pune

    Share resume: [HIDDEN TEXT]

    #Hiring #DesignVerification #SystemVerilog #UVM #VLSI #ASIC #SoC #Semiconductor #Verification #AMBA #ARM #PCIe

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    Section · 02

    Skills

    Constrained-random verification functional coverageMonitors Checkers Scoreboards AssertionsEthernetUnix LinuxshellPerlPCIEMakefileAMBA ProtocolsPythonSystemVerilog/UVM

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