Walk-in || HCL Walkin For Hardware Design Engineer on 17th October in Chennai

HCLTech #Hardwaredesign Engineers #Walkin on 17th October in #Chennai

Join a team that values innovation, growth, and impactful work. Dont miss the chance to work with cutting-edge Project in SME and be a part of something transformative!

#Apply: https://lnkd.in/gAGVPPKM

#PostingLink: https://lnkd.in/gKkxqwPY

#DriveDate: 17th October Saturday (9AM-2PM)

#ContactPerson: Katherine Sylvia

#VenueLocation: #Chennai

HCLTech Elcot Sez,New Cafe 2nd Floor
602/3, 138, Medavakkam High Road,
Sholinganallur, Chennai-600119

#Position: Hardware design Engineer (Technical Lead, Senior Technical Lead, Technical Manager)

#Experience: 5-12 years

#JobLocation: Chennai/Bangalore

#Skill:

Hardware Design & Development, Electrical new Design, Design Changes, Schematic design, , Hardware failure debug, verification protocol understanding & test execution, sustenance Projects.

#Area: Analog Design, Highspeed Design, Mixed Signal Design Digital Design, Power electronic system.

#JD:

#Qualification: B.E/B.Tech Electrical or Relevant Field

#HardwareDesignEngineer:

#Experience: 5 - 12 Years

#HardwareKeyskills:

#Schematic, #SchematicDesign, #ElectricalSchematics, #Componentselection, #Obsolescence, #EmbeddedHardware, #Analog, #Digital, #EMI/ #EMC, #Powersupply, #Sensor, #Mixedsignal, #Aerospaceelectronics, #RTCA #DO-160, #Rootcauseanalysis, #HardwareTesting, #ADC/ #DAC, #ADC& #DACDesign.

#HighSpeedDesign: 5-12 years

1. #Highspeedcircuitdesign
2.     Derating, Stress, Timing, Logic Compatibility and power analysis
3.     Experience on interfaces like SPI, I2C, RS-422/485, USB, CAN, UART, ARINC429
4.     Experience on Highspeed interface such as #DDR3/4/5, #SGMII, #RGMII, #Ethernet(1G/10G/25G), USB 3.0 and high speed serdes interfaces like PCIe, SATA
5.     Experience on Processors #Jetson #NVDIA, #AMD, #NxP and Ti based Processors/Microcontrollers based circuit Design
6.     Experience on #Highspeedtesting
7.     Experience on Eye-pattern and Jitter measurements for High Speed Interfaces like #PCIe #Gen4, 10G Ethernet
8.     Experience in Design verification and validation.
9.     Experience in High-speed design #Boardbringup.

#ToolKnowledge: Mentor Graphic Expedition DX designer, LTSpice and Pspice, Cadence Allegro V17.2, OrCAD Capture/Concept HDL

#ContactPerson: Katherine Sylvia

Interested candidates can share their CV on below mail id [email removed] with Below details Current Company, Current CTC, Expected CTC, Notice Period, Location.