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    Job · 14992754

    Einfochips logo

    Technical Lead-Design Verification

    Einfochips · Bengaluru · onsite · Posted 52d ago

    Not disclosed8–10 yrsfulltimeSourced fromFoundit

    About a minute. You'll make an account on the way through.

    About this role


    POSITION TITLE: Technical Lead – ASIC Design Verification

    LOCATION: Bangalore/ Hyderabad/ Pune/ Chennai/ Ahmedabad

    POSITION SUMMARY

    The candidate should have direct and first-hand experience working in managing 4 -10 member engineering team – and servicing clients in Project (ODC) based execution model as well as Staffing (Hyderabad Onsite requirements).

    ROLE & RESPONSIBILITIES

    • Incumbent will be responsible for Architecting Verification Environment for ASIC SoC and providing verification support from defining verification plan to various customers products
    • Incumbent will lead of an IP Verification team and provide technical leadership to the Design Verification team as a whole
    • To lead a team of 10-13 engineers
    • Effectively manage team members through coaching and mentoring and provide guidance and career planning to team-members.
    • Must lead management and customer reviews for multiple projects
    • The specification, implementation, and maintenance of an integrated end-to-end formal verification flow for the formal verification objective.
    • Develop/modify scripts to automate the verification process.
    • Maintain and extend assertion libraries, including support for both simulation and FV.
    • Developing verification environment including environment assumptions, assertions, and cover properties in context of the verification plan

    ESSENTIAL SKILLS & EXPERIENCE

    • Minimum 8 years of experience in System Verilog HVL.
    • Minimum 8 year of experience in OVM/UVM/VMM/Test Harness.
    • Hands on experience of developing assertion, checkers, coverage and scenario creation.
    • Must have executed at-least 2 to 3 SoC Verification projects
    • Experience in developing test and coverage plan, Verification environment and validation plan.
    • Knowledge of at-least one industry standard protocols like Ethernet, PCIe, MIPI, USB or similar is required.
    • Review and Audit participation.
    • At-least 1 years of experience in handling team of 5 to 10 engineers.
    • Define/derive Scope, Estimation, Schedule and Deliverables of proposed work.
    • Assure compatibility of resources, tools, platform
    • Work with customers through acceptance of deliverables.
    • Effectively manage team members through coaching and mentoring and provide guidance and career planning to team-members.

    EDUCATION BACKGROUND

    • B.E./ B.S./ B.Tech/ M.S./ M.Tech in VLSI/Electronics/Electrical/Computer/Instrumentation Engineering.

    Sourced from foundit

    Skills

    Validation planUVMOvmCoverage and scenario creationVerification environmentSystem Verilog HVLTest and coverage planAssertion checkersVMM Test Harness

    About Einfochips

    Einfochips logo

    Einfochips

    IT Services & Consulting

    3.2k+

    employees

    1994

    32 years old

    San Jose, California

    United States (USA)

    About

    eInfochips, an Arrow company, is a product engineering and semiconductor design services firm, specializing in digital transformation and connected IoT solutions across various cloud platforms.

    Industries

    IT Services & ConsultingDesignEngineering & Construction

    Employee ratings

    614 reviews

    3.5/ 5

    Culture

    3.5

    Career growth

    2.8

    Work-life

    3.6

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