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    Job · 14466310

    GLOBALFOUNDRIES logo

    Standard Cell Layout Design Engineer

    GLOBALFOUNDRIES · Bengaluru · onsite · Posted 54d ago

    Not disclosed10–15 yrsfulltimeSourced fromFoundit

    About a minute. You'll make an account on the way through.

    About this role

    Standard Cell Layout Design Engineer

    Location: Bangalore, Karnataka, India

    Job Type: Full-Time

    About GLOBALFOUNDRIES

    GLOBALFOUNDRIES is a world leader in semiconductor manufacturing, offering an unparalleled combination of design, development, and fabrication services to empower innovative technology companies. With a global presence spanning three continents, GLOBALFOUNDRIES is dedicated to transforming industries and shaping markets. Visit www.gf.com for more information.

    Role Overview

    Join our Foundry IP Development team in Bangalore to design and optimize high-quality Standard Cell IPs for advanced process nodes. Collaborate with global engineering teams to deliver cutting-edge layouts that meet the highest industry standards.

    Key Responsibilities:

    • Develop and optimize layouts for Standard Cell IPs, including combinational and sequential cells
    • Conduct layout verification (LVS, DRC, DFM, EMIR) and review
    • Support layout teams with design kit preparation, validation, and layout automation
    • Design Power Management Kit cells (e.g., Level Shifters, Isolation, Power Gating)
    • Create custom cells to meet low-power and high-speed design requirements
    • Participate in test chip integration, silicon bring-up, and characterization
    • Document specifications and contribute to productivity improvements and innovation

    Required Qualifications:

    • Bachelor's degree with 10+ years or Master's degree with 8+ years in Semiconductors/Microelectronics/VLSI Engineering
    • Hands-on experience in Standard Cell layout design, including:
    • Combinational and Sequential Cells
    • Power Management Kit cells (Level Shifter, Isolation, Always-on Cells)
    • Ultra High-Density and High-Performance Libraries
    • Proficiency in EDA tools (Synopsys, Mentor, Cadence) for layout design, parasitic extraction, DRC, LVS, DFM, EMIR
    • Basic understanding of semiconductor fabrication steps
    • Experience in test chip integration

    Preferred Qualifications:

    • Strong knowledge of CMOS technology and state-of-the-art standard cell layout flows
    • Experience with 45/32/28nm and below technology nodes
    • Programming skills for design flow automation
    • Ability to work in dynamic, interdisciplinary, and international environments
    • Excellent communication and problem-solving skills

    Why Join GLOBALFOUNDRIES

    Be part of a dynamic team, work on cutting-edge technology, and help shape the future of the semiconductor industry. Take your career to the next level with GLOBALFOUNDRIES!

    Apply Today!

    Sourced from foundit

    Skills

    Cell Developmenteda toolsPower gatingLevel-shifter

    About GLOBALFOUNDRIES

    GLOBALFOUNDRIES logo

    GLOBALFOUNDRIES

    Semiconductors

    760

    employees

    2009

    17 years old

    New York, New York

    MT

    ₹18.9L PA avg

    Avg at GLOBALFOUNDRIES

    About

    GLOBALFOUNDRIES specializes in semiconductor manufacturing, providing clients with tailored solutions that drive innovation in high-growth market sectors worldwide.

    Industries

    SemiconductorsManufacturingElectronics

    Employee ratings

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    Culture

    3.6

    Career growth

    2.7

    Work-life

    3.8

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