Staff Validation Engineer

Job Description: DDR Functional Validation Engineer

Role Overview

We are looking for a DDR Functional Validation Engineer with 3 to 8 years of experience in silicon validation, memory subsystem debug, and firmware-based validation. The candidate will be responsible for validating DDR memory interfaces on complex SoC platforms, executing test plans, developing test cases, debugging silicon issues, and supporting silicon bring-up activities.

This role requires strong knowledge of DDR4, DDR5, LPDDR5, and LPDDR6 protocols, along with a good understanding of memory controller and PHY architecture. The ideal candidate should be comfortable working across hardware, firmware, and system-level validation environments.

Key Responsibilities

• Perform functional validation of DDR memory subsystems on pre-silicon and post-silicon platforms.
• Execute validation test plans for DDR4, DDR5, LPDDR5, and LPDDR6 interfaces.
• Develop, enhance, and maintain validation test cases for memory controller, DDR PHY, training flows, initialization sequences, low-power features, and system-level stress scenarios.
• Support silicon bring-up activities, including DDR initialization, boot flow debug, memory training debug, and platform stabilization.
• Debug silicon issues related to DDR functionality, timing, training failures, memory errors, system hangs, boot failures, and performance anomalies.
• Work closely with architecture, design, firmware, platform, and signal integrity teams to identify root causes and drive issues to closure.
• Develop and debug firmware used for DDR initialization, training, configuration, and validation.
• Analyze validation failures using logs, traces, register dumps, firmware debug messages, protocol analyzer outputs, oscilloscopes, logic analyzers, and other debug tools.
• Validate memory controller and PHY features across different operating frequencies, voltage corners, power states, and stress conditions.
• Create and maintain validation documentation, including test plans, test case specifications, debug notes, issue reports, and execution summaries.
• Participate in reviews of DDR architecture, controller features, PHY behavior, firmware flows, and validation coverage.
• Execute system stress scenarios involving memory bandwidth, concurrency, thermal stress, voltage/frequency scaling, low-power entry/exit, and long-duration stability testing.
• Collaborate with cross-functional teams to improve validation coverage, debug methodology, and automation infrastructure.
• Track validation progress, report issues clearly, and support defect triage through bug tracking systems.
  
  

Required Qualifications

• 3 to 8 years of experience in silicon validation, post-silicon validation, platform validation, firmware validation, or memory subsystem validation.
• Strong understanding of DDR4, DDR5, LPDDR5, and/or LPDDR6 protocols.
• Hands-on experience with DDR functional validation, silicon debug, test execution, and failure analysis.
• Experience in test plan execution and test case creation for memory subsystem features.
• Good understanding of memory controller and DDR PHY architecture.
• Experience with silicon bring-up, board bring-up, or SoC/platform bring-up.
• Knowledge of DDR initialization, memory training, boot flows, and firmware-controlled configuration sequences.
• Experience in firmware development, firmware debug, or low-level embedded software validation.
• Basic understanding of signal integrity concepts such as timing margins, eye diagrams, impedance, jitter, noise, voltage margins, and board-level effects.
• Ability to debug complex hardware, firmware, and system-level issues.
• Familiarity with system stress validation, including memory stress, power stress, boot stress, reset stress, and long-duration stability scenarios.
• Basic coding skills in C, Python, or scripting languages for test development, automation, log parsing, and debug support.
• Ability to read and understand technical specifications, register descriptions, memory datasheets, protocol documents, and architecture documents.
• Strong analytical, debugging, and problem-solving skills.
• Good communication skills and ability to work with cross-functional teams.
  
  

Technical Skills

• DDR Protocols: DDR4, DDR5, LPDDR5, LPDDR6
• Validation Areas: Functional validation, silicon validation, platform validation, system validation
• Debug Areas: Silicon debug, firmware debug, boot debug, memory training debug, system hang debug
• Architecture Knowledge: Memory controller, DDR PHY, SoC interconnect basics, boot flows
• Firmware: Low-level firmware development, register programming, initialization sequences
• Programming/Scripting: C, Python, Perl, Shell scripting, or equivalent
• Tools: JTAG debuggers, oscilloscopes, logic analyzers, protocol analyzers, lab debug tools
• Test Areas: Test plan execution, test case creation, regression testing, stress testing, corner testing
  
  

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Accommodations at Arm

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Hybrid Working at Arm

Arm's approach to hybrid working is designed to create a working environment that supports both high performance and personal wellbeing. We believe in bringing people together face to face to enable us to work at pace, whilst recognizing the value of flexibility. Within that framework, we empower groups/teams to determine their own hybrid working patterns, depending on the work and the team's needs. Details of what this means for each role will be shared upon application. In some cases, the flexibility we can offer is limited by local legal, regulatory, tax, or other considerations, and where this is the case, we will collaborate with you to find the best solution. Please talk to us to find out more about what this could look like for you.

Equal Opportunities at Arm

Arm is an equal opportunity employer, committed to providing an environment of mutual respect where equal opportunities are available to all applicants and colleagues. We are a diverse organization of dedicated and innovative individuals, and don't discriminate on the basis of race, color, religion, sex, sexual orientation, gender identity, national origin, disability, or status as a protected veteran.