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    Job · 16350941

    Renesas logo

    Sr Staff Engineer, Low Power & Formal Equivalence Verification

    Renesas · Bengaluru · onsite · Posted 44d ago

    Undisclosed10–15 yrsfulltimeSourced fromNaukri

    About a minute. You'll make an account on the way through.

    About this role

    We are seeking a highly motivated and experienced engineer to lead Low Power (Power Intent) and Formal Equivalence Verification (FEV/LEC) activities for complex ASIC/SoC programs. The ideal candidate will be responsible for defining and signing off power intent (UPF/CPF), ensuring correct low-power implementation across all design stages, and driving formal equivalence verification from RTL through synthesis, DFT, implementation, and ECOs to tapeout.
    This role requires close collaboration with Architecture, RTL, Verification, Synthesis, DFT, STA, Physical Design, PDN, and Signoff teams to ensure functional correctness, low-power integrity, and successful tapeout execution.
    Key Responsibilities
    Low Power / Power Intent
    • Define, develop, and maintain low-power architecture and power intent using UPF/CPF.
    • Own power-domain and power-state specifications across IP, subsystem, and chip-level designs.
    • Drive implementation and integration of isolation, retention, level shifters, and power-switch methodologies.
    • Debug and resolve power-intent issues across RTL, synthesis, implementation, and ECO stages.
    • Collaborate with cross-functional teams to ensure power-aware constraints, methodologies, and signoff checks.
    • Drive low-power issue closure and tapeout readiness.
    Formal Equivalence Verification
    • Execute formal equivalence checks at key design milestones:
      • RTL Synthesis
      • Synthesis DFT
      • DFT Physical Design
      • Pre-ECO Post-ECO
    • Analyze and debug equivalence failures related to constraints, mapping, low-power insertion, DFT logic, and ECO changes.
    • Drive issue resolution with clear ownership and closure tracking.
    • Validate RTL, netlists, library models, constraints, and ECO patches for functional equivalence.
    • Generate signoff-quality reports and support milestone/tapeout reviews.
    Methodology & Automation
    • Develop automation and reusable methodologies to improve verification efficiency and quality.
    • Create scripts and checks for low-power validation, equivalence verification, and issue tracking.
    • Drive continuous improvements in low-power and formal verification flows. Qualifications
    • Bachelors or Masters degree in Electronics Engineering or Electrical Engineering.
    • 10-15 years of experience in ASIC/SoC implementation, low-power design, or formal verification.
    • Strong expertise in UPF/CPF-based low-power methodologies.
    • Deep understanding of power domains, power states, isolation, retention, level shifters, and power gating.
    • Hands-on experience with Formal Equivalence Verification (FEV/LEC) tools and methodologies.
    • Strong understanding of synthesis, DFT, STA, ECO, and implementation flows.
    • Proficiency in Tcl, Python, Perl, or Shell scripting.
    • Excellent debugging, analytical, and problem-solving skills.
    Preferred Qualifications
    • Experience with advanced-node technologies (7nm and below).
    • Knowledge of Physical Design, PDN, STA, and signoff methodologies.
    • Experience supporting full-chip SoC tapeouts.
    • Strong collaboration skills and experience working across global design teams.
    Why Join Us
    Join a high-performance engineering team developing next-generation semiconductor products. You will play a critical role in ensuring low-power integrity and functional correctness across the complete RTL-to-GDSII flow, directly contributing to successful tapeouts on advanced technology nodes.


    Disclaimer: This job posting has been aggregated from external source. Role details, content, and availability are subject to change. Applicants are advised to confirm the latest information directly on the company website before applying.

    Sourced from naukri

    Skills

    AutomationScriptingformal verificationPower Integrityperformance engineeringphysical designPerlASICMappingDFTElectronics EngineeringLow-Power DesigndebuggingDebugelectrical engineeringPythonNode.JsArchitecture

    About Renesas

    Renesas logo

    Renesas

    Bangalore / Bengaluru, Karnataka

    India

    ₹30.6L PA avg

    Avg at Renesas

    About

    Renesas is a leading semiconductor manufacturer, producing various types of microchips and striving to enhance the global chipmaking industry through innovation.

    Industries

    ManufacturingElectronics

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    3.5/ 5

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    3.5

    Career growth

    2.7

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    2.7

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