Sr/Principal Frontend Design Engineer

Roles and Responsibilities

• We are seeking an experienced RTL Design Engineer to implement RTL blocks in close collaboration with architects and micro-architects.
• The role involves design of high-speed interfaces such as PCIe Gen 6/7, DDR4/5/6, HBM3/4/4e protocol-based designs using SystemVerilog and RTL coding.
  
• Develop SoC designs from scratch including CPU, memory controllers, peripherals, and interface circuits.
  
• Collaborate with cross-functional teams to integrate IP blocks into a single chip design.
  
• Ensure compliance with industry standards and regulatory requirements through thorough verification processes.
  
• Participate in architecture definition, microarchitecture development, and physical implementation of complex digital circuits.