Sr. FPGA Design Engineer

Must be a post graduate/under graduate in ECE/Electronics from a reputed engineering college/Institute.

Must be very good in Verilog programming/Debugging/able to write synthesizable codes.

A very good understanding and hands on working level experience in basic digital building blocks/logic modules .

Must have worked in top level SoC integration of processor cores with standard Peripherals.Must have exposure to communication protocols

Must have solid working level experience in ModelSim/VCS and other industry standard simulator tools.

Should be very good in the debugging the HDL codes and be able to make progress by identifying and fixing the issues/bugs in the design.

Working level experience in the standard FPGA architectures, FPGA based system design, IP development

Need to take independent responsibilities/activities. Exposure on C/C based programming/ Perl scripts/basic cshell scripting languages are desireable.

Disclaimer: This job posting has been aggregated from external source. Role details, content, and availability are subject to change. Applicants are advised to confirm the latest information directly on the company website before applying.