Sr DV Engineer - UVM/SystemVerilog
Sourceright Technologies · Bengaluru · onsite · Posted 61d ago
Undisclosed8–10 yrsfulltimeSourced from
About a minute. You'll make an account on the way through.
About this role
Position: Senior DV Engineer - UVM/SystemVerilog (BB810ST RM 4328)
Very good knowledge of UVM and SystemVerilog.
Some networking experience/exposure is welcome.
Job Category: Others
Job Type: Full Time
Job Location: Bangalore
Experience: 8-10 years
Notice period: 0-30 days
Disclaimer: This job posting has been aggregated from external source. Role details, content, and availability are subject to change. Applicants are advised to confirm the latest information directly on the company website before applying.
Sourced from naukri
Skills
Corporate SalesVerilogUVMSystem VerilogSOC VerificationVHDLMutual FundsBusiness DevelopmentPortfolio ManagementWealth ManagementClient Relationship ManagementSalesmarketingRMInsuranceRelationship Management