Sr. Design Engineer 2

Job Summary

A Physical Design Engineer responsible for implementing complex SoCs and IP blocks, driving floorplanning, placement, CTS, routing, and timing closure to deliver manufacturable designs. This role requires strong collaboration with RTL, STA, and verification teams, focusing on power optimization, signal integrity, DRC/LVS resolution, ECO execution, and tape-out readiness within the semiconductor industry.

Job Designation

Physical Design Engineer

What you'll do

• Implement floorplanning, placement, CTS, routing, and achieve timing closure for complex designs
• Optimize power and address signal integrity and design rule checks throughout implementation
• Collaborate with RTL, static timing analysis, and verification teams to ensure design quality
• Execute physical verification (LVS/DRC) and drive resolution of manufacturing issues
• Support ECO implementation and manage tasks required for successful tape-out
• Use industry-standard EDA tools (Cadence, Synopsys, Mentor) for full PD flow

Who you are

• Skilled in physical implementation for SoCs with strong problem-solving and collaboration skills
• Proficient with CTS, routing strategies, and timing closure methodologies
• Experienced in power optimization techniques and signal integrity mitigation practices
• Comfortable performing DRC/LVS checks and guiding issue resolution to tape-out
• Effective communicator who works well across RTL, STA, and verification teams

Disclaimer: This job posting has been aggregated from external source. Role details, content, and availability are subject to change. Applicants are advised to confirm the latest information directly on the company website before applying.