Software Development Engineer in Test (SDET) – Principal 1, GJFA 5 Level 1

Role Summary: Principal technical engineer responsible for defining and advancing software-in-the-loop (SIL) test strategy, architecture, and automation for safety-critical, real-time embedded medical device firmware. The role combines strong embedded C/C++ expertise and hands-on engineering with technical leadership of test design, firmware adaptations, hardware simulations, and framework evolution across subsystems and products. Tests and simulations use Python; Python familiarity is strongly preferred, with the ability and willingness to develop proficiency required.

Key Responsibilities: ·    Analyze firmware requirements, architecture, C/C++ source code, design principles, and manual test procedures to establish expected behavior and define traceable SIL test solutions ·    Own end-to-end technical accountability for the SIL capability: establish its architecture, design approach, and technical roadmap; guide evolution across subsystems and products; and drive implementation through reliable operational use ·    Define and track SIL success criteria with stakeholders, including meaningful firmware test coverage, test reliability, execution turnaround, defect-detection effectiveness, and effort to support additional subsystems and products; prioritize improvements and drive resolution of technical risks and dependencies ·    Direct design decisions and technical reviews, record key tradeoffs, and set interface definitions, abstraction boundaries, extension mechanisms, and engineering standards for simulation fidelity, maintainability, and reuse. Develop and maintain scalable Python-based tests, hardware simulations, utilities, and reusable libraries within the existing SIL framework ·    Define, review, and contribute to C/C++ firmware and operating system and hardware interface adaptations for host-based SIL execution, establishing appropriate boundaries between firmware and simulations ·    Define and review positive, negative, boundary-condition, and fault-injection test approaches covering functional behavior, interfaces, recovery, state transitions, and regression, including timeouts, sequencing, and concurrency-related behavior within SIL capabilities ·    Lead complex failure analysis across firmware, interface adaptations, simulations, framework components, and test code, distinguishing product defects from test-environment issues and driving systemic improvements ·    Drive integration of automated tests with Azure DevOps (ADO), GitHub, and CI workflows ·    Collaborate with embedded software, systems, architecture, verification, and quality teams to improve testability and establish simulation fidelity criteria, assess SIL-versus-target limitations, and address their impact on test validity without assuming target-equivalent execution timing ·    Establish and review standards for traceability, repeatable and isolated tests, controlled firmware and test configurations, review records, and retained results to support regression testing and assess suitability for formal verification use ·    Provide technical guidance, mentoring, and design and code reviews for SDETs and software engineers

Key Requirements/Minimum Qualifications: ·    Bachelor’s or Master’s degree in Electronics & Communication, Computer Science, Electrical Engineering, or related field ·    10–15 years of relevant experience grounded in hands-on embedded software/firmware development; general software verification, test automation, or SDET experience alone does not substitute for this foundation ·    Strong hands-on embedded C/C++ firmware development experience and understanding of firmware architecture, design principles, microcontrollers, peripherals, hardware interfaces, platform software, and abstraction layers ·    Hands-on experience with real-time operating systems (RTOS) and operating system abstraction concepts ·    Demonstrated ability to learn programming languages and tools, and willingness to build Python proficiency for test automation, framework development, and hardware simulation; prior Python experience is strongly preferred ·    Demonstrated experience architecting maintainable software infrastructure or embedded test frameworks, including abstraction design, reusable components, and technical design reviews; ability to apply firmware source-code analysis to test strategy and failure investigation Strong understanding of real-time system fundamentals, including scheduling, interrupts, concurrency, timing behavior, communication interfaces, and fault recovery ·    Experience with medical device software development and IEC 62304 lifecycle practices ·    Knowledge of risk-based verification, requirements traceability, configuration management, and objective test evidence ·    Python programming familiarity is strongly preferred, particularly for automated testing, hardware simulation, or engineering tools ·    Experience with pytest, test doubles, mocking, code coverage, static analysis, CMake, or containerized test environments ·    Experience with SIL or hardware-in-the-loop (HIL) testing, simulation-based testing, or specific RTOS platforms such as ThreadX or FreeRTOS ·    Experience coordinating work across internal teams and external engineering partners ·    Strong system-level debugging, root-cause analysis, and problem-solving skills ·    Test architecture, automation design, and framework maintainability ·    Technical leadership, mentoring, and cross-functional decision-making ·    Attention to detail, structured thinking, and strong ownership ·    Ability to translate complex requirements and product risks into traceable verification solutions

Work hours: 1 PM to 10 PM IST

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