SOC Design Verification Sr Lead Engineer

Company

Qualcomm India Private Limited

Job Area

Engineering Group, Engineering Group > ASICS Engineering

General Summary

As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next-generation experiences and drives communication and data processing transformation to help create a smarter, connected future for all. As a Qualcomm ASIC Engineer, you will define, model, design (digital and/or analog), optimize, verify, validate, implement, and document IP (block/SoC) development for a variety of high performance, high quality, low power world class products. Qualcomm Engineers collaborate with cross-functional groups to determine product execution path.

Minimum Qualifications

• Bachelor's degree in Science, Engineering, or related field and 2+ years of ASIC design, verification, validation, integration, or related work experience.
  
  

OR

Master's degree in Science, Engineering, or related field and 1+ year of ASIC design, verification, validation, integration, or related work experience.

OR

PhD in Science, Engineering, or related field.

• Understand the design specification and implementation, define the verification scope, develop test plans, tests, and the verification infrastructure and verify the correctness of the design.
• Responsible to implement and analyze system Verilog assertion and coverage(code, toggle, functional) .
• Work alongside other members of the verification team to analyze, develop and execute verification test cases and able to provide relevant solution to issue.
• Collaborate with architects, designers, and pre and post silicon verification teams to accomplish your tasks.
• Adhere to quality standards and good test and verification practices.
• B.E/B. Tech/M.E/M. Tech in electronics with 3+ year experience in verification domain.
• Prior work experience on IP level or Soc level.
• Prior work on UFS (Universal Flash Storage),Ethernet and PCIe Protocol is desirable.
• Good understanding of processor based Soc level verification which includes native ,Verilog ,system Verilog and UVM mix environment.
• Hand on experience with verification tools such as VCS, waveform analyzer and third party VIP integration (such as Synopsys VIPs).
• Hands on experience in UVM. C/C++ ,System Verilog verification language.
• Good understanding of AXI-AMBA protocol variants.
• Can work with scripting language (shell, Makefile, Perl )
• Strong understanding of design concepts and ASIC flow.
• Good problem solving , analytical and debugging skill is must.
  
  

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