Senior Verification Engineer, PCIe

NVIDIA is seeking a Senior Verification Engineer to verify the design and implementation of the next generation of PCI Express controllers for GPUs and SoCs.

What you'll be doing:

• Be responsible for verification of the ASIC design, architecture, golden models and micro-architecture of PCIe controllers at IP/sub-system levels using state-of-the-art verification methodologies such as UVM.
• Build reusable bus functional models, monitors, checkers and scoreboards following coverage-driven verification methodology.
• Understand the design specification and implementation, define the verification scope, develop test plans, tests, and the verification infrastructure, and verify the correctness of the design.
• Collaborate with architects, designers, and pre- and post-silicon verification teams to accomplish your tasks.

What we need to see:

• B.Tech./M.Tech or equivalent experience
• 1+ years of relevant experience
• Experience in verification at unit/sub-system/SoC level and expertise in Verilog and SystemVerilog
• Expertise in comprehensive verification of IP or interconnect protocols (e.g. PCI Express, USB, SATA)
• Experience in developing and working in functional coverage-based constrained random verification environments
• Background in DV methodologies like UVM/VMM and exposure to industry-standard verification tools for simulation and debug

Ways to stand out from the crowd:

• Excellent knowledge of PCIe protocol - Gen3 and above
• Good understanding of the system-level architecture of PCIe/CXL-based designs
• Perl, Python or similar scripting and software programming language experience
• Good debugging and analytical skills
• Good interpersonal skills and desire to work as a great teammate