Senior Verification Engineer - ASIC/System Verilog
Avant Garde Industries · Bengaluru · onsite · Posted 39d ago
Not disclosed8–15 yrsfulltimeSourced from
About a minute. You'll make an account on the way through.
About this role
Senior Verification Engineer - ASIC/System Verilog
Sourced from hirist
Skills
Mixed SignalverificationUVMSystem VerilogFPGAASIC
About Avant Garde Industries
Avant Garde Industries
Industrial Machinery
100
employees
2016
10 years old
Mumbai, Maharashtra
India
₹5.4L PA avg
Avg at Avant Garde Industries
Industries
Industrial MachineryPackaging
Employee ratings
10 reviews
4.7/ 5
Culture
4.6
Career growth
4.6
Work-life
4.6
Employees rate it well for
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