Senior Staff engineer- GPU Power Engineer
Qualcomm · Noida · onsite · Posted 28d ago
Undisclosed12–17 yrsfulltimeSourced from
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About this role
Company: Qualcomm India Private Limited
Job Area: Engineering Group, Engineering Group > Hardware Engineering
General Summary As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next-generation experiences and drives digital transformation to help create a smarter, connected future for all. As a Qualcomm Hardware Engineer, you will plan, design, optimize, verify, and test electronic systems, bring-up yield, circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems that launch cutting-edge, world class products. Qualcomm Hardware Engineers collaborate with cross-functional teams to develop solutions and meet performance requirements.
GPU Power Engineer Location: Noida
As a GPU RTL Power Engineer, you will contribute to power optimization efforts for GPU blocks and subsystems, delivering industry-leading energy efficiency for Qualcomm next-generation GPUs used in premium smartphones and adjacent market segments- Automotive / Compute / XR / AI. In this highly impactful role, you will be responsible for Power Efficiency / Performance per watt analysis for the GPU on industry standard Benchmarks/Games from early feature specification stages to Silicon. You will partner closely with hardware, software, and system-level design teams to support architectural, microarchitectural, and RTL-level power optimization strategies.
Minimum Qualifications - 12+ years of experience with a Bachelor's degree in Computer Science/Computer Engineering/relevant technical field, or a Master's degree.
- Understanding of RTL power optimization fundamentals, including switching activity, clock/enable efficiency, and common lowpower design patterns at the RTL level.
- Familiarity with RTL power analysis and optimization using tools such as PowerArtist, PTPX, PowerPro or equivalent.
- Familiarity with low-power design techniques, including clock gating, power gating, and managing dynamic vs. leakage power tradeoffs.
- Knowledge of Emulation Power flow and methodology.
- Knowledge of backend flows such as logic synthesis and placeandroute, and how RTL decisions impact postlayout power and timing.
- Hands-on experience of debugging RTL or gatelevel power anomalies and identifying rootcause structures or scenarios.
- Strong Python programming skills for building automation scripts, data pipelines, and AI/MLdriven analysis flows for RTL power optimization.
- Excellent debugging, analytical, and problem-solving skills using data-driven approach.
- Excellent written and verbal communication skills for documenting designs, methodologies, and best practices.
- Excellent collaboration skills, with the ability to navigate ambiguity in a fast-paced, global team environment.
- Knowledge of Graphics architecture
- Knowledge of OpenGL and(or) Vulkan API libraries
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Design PatternsAutomationHardware Engineeringcomputer engineeringAnalogAutomotiveBuilding AutomationElectronics EngineeringdebuggingGraphicsCommunication SkillsDigital TransformationArchitectureData PipelineArtificial Intelligence
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