Senior Staff Engineer - DFT
BITSILICA · Bengaluru · onsite · Posted 52d ago
Not disclosed10–12 yrsfulltimeSourced from
About a minute. You'll make an account on the way through.
About this role
- 10+ yrs of experience in DFT architecture, scan Insertion, compression at core level and SoC level.
- Experience in ATPG pattern generation, coverage analysis
- Experience with timing and no-timing simulations
- Experience in Memory-BIST
- Have understanding of SSN architecture, clock architecture, OCC
Location: Bangalore
Sourced from foundit
Skills
SSN Architectureclock architecturecompression at core levelno-timing simulationscoverage analysisscan insertionmemory BISTDFT ArchitectureATPG Pattern generationocctiming simulations