Senior STA Engineer
Aster Labs · Ahmedabad · onsite · Posted 37d ago
Undisclosed4–8 yrsfulltimeSourced from
About a minute. You'll make an account on the way through.
About this role
Position: Senior STA Engineer
Experience: 4-8 years
Location: Ahmedabad
Employment Type: Full-time
Job Summary
We are looking for a Senior STA Engineer with strong expertise in Static Timing Analysis, timing signoff, and timing closure for complex ASIC/SoC designs. The candidate will own timing analysis activities across the design flow and work closely with RTL, Synthesis, Physical Design, and Signoff teams to resolve complex timing issues.
Responsibilities
- Own STA and timing signoff activities from synthesis through physical design and tape-out.
- Perform MCMM/MMMC timing analysis across all functional and test modes.
- Analyze and debug setup, hold, recovery, removal, min/max, and clock-related violations .
- Develop, review, and validate SDC constraints , including clocks, generated clocks, I/O delays, false paths, multicycle paths, and timing exceptions.
- Perform detailed clock tree and clock timing analysis , including skew, latency, uncertainty, jitter, and clock reconvergence.
- Drive timing closure in collaboration with RTL, synthesis, physical design, and ECO teams.
- Analyze critical timing paths and recommend design, synthesis, placement, routing, or ECO solutions.
- Perform timing analysis considering OCV/AOCV/POCV, derates, SI/crosstalk, and process-voltage-temperature variations .
- Review timing constraints and methodology to ensure signoff-quality timing analysis .
- Support timing ECOs and evaluate their impact across multiple corners and modes.
- Develop and maintain Tcl/Python automation for STA analysis, report generation, and flow optimization.
- Debug complex timing issues and provide technical guidance to junior STA engineers.
- Participate in methodology development, flow improvements, and timing signoff reviews.
- Coordinate with cross-functional teams to ensure project milestones and tape-out schedules are achieved.
Required Technical Skills
- Strong expertise in Static Timing Analysis and timing closure .
- Hands-on experience with Synopsys PrimeTime, Cadence Tempus , or equivalent STA tools.
- Excellent knowledge of SDC constraints and timing exceptions .
- Strong understanding of ASIC/SoC design, synthesis, physical design, and signoff flows .
- Expertise in MCMM/MMMC analysis .
- Good understanding of OCV/AOCV/POCV, CPPR, SI/crosstalk, derating, and variation-aware timing .
- Strong knowledge of clock-domain timing, clock uncertainty, skew, latency, and clock reconvergence.
- Proficiency in Tcl scripting ; Python/Perl scripting is an advantage.
- Strong debugging, analytical, and problem-solving skills.
Senior-Level Expectations
- Ability to independently own STA for a block or full-chip design .
- Ability to identify root causes of complex timing violations and drive them to closure.
- Ability to interact effectively with design, RTL, synthesis, PD, CTS, and signoff teams .
- Experience mentoring junior engineers and reviewing their STA work.
- Strong ownership, communication, and project-management skills.
- Ability to work in a fast-paced semiconductor environment and deliver against tight tape-out schedules.
Education
B.E./B.Tech/M.E./M.Tech in Electronics, Electrical Engineering, VLSI, or a related discipline.
Disclaimer: This job posting has been aggregated from external source. Role details, content, and availability are subject to change. Applicants are advised to confirm the latest information directly on the company website before applying.
Sourced from naukri
Skills
AutomationSOCVLSIphysical designChip designEthernetsemiconductorASICPCIEPython
About Aster Labs
Aster Labs
Bengaluru
IN
₹7.1L PA avg
Avg at Aster Labs
About
Astera Labs is a global leader in purpose-built connectivity solutions that unlock the full potential of AI and cloud infrastructure. Our Intelligent Connectivity Platform integrates PCIe, CXL, and Ethernet semiconductor-based solutions and the COSMOS software suite of system management and optimization tools to deliver a software-defined architecture that is both scalable and customizable. Inspired by trusted relationships with hyperscalers and the data center ecosystem, we are an innovation leader delivering products that are flexible and interoperable.
Industries
Health CareHealth DiagnosticsMedical
Employee ratings
10 reviews
4.2/ 5
Culture
3.3
Career growth
3.4
Work-life
3.8
Employees rate it well for
Overall Company42Work-Life Balance41
Find them on