Senior silicon validation Debug Engineer

Role Overview

The DPU Silicon System Debug Engineer investigates, diagnoses, and resolves complex display subsystem issues across Qualcomm platforms. You will partner with hardware, software, validation, and customer engineering teams to drive rapid root-cause analysis and help the relevant teams implement durable fixes.

Leveling: This position is open at the Engineer and Senior Engineer levels. Level will be determined based on experience, technical depth, and demonstrated ownership.

• Engineer: Contributes to debugging and triage efforts with guidance and builds scripts/tools to improve analysis and turnaround time.
• Senior Engineer: Leads ambiguous, cross-layer investigations end-to-end, influences technical direction across teams, and mentors engineers to scale best practices.

Qualcomm is a global leader in wireless technologies and semiconductors, powering many of the world's connected devices. The DPU Silicon System Debug team sits within the Display Subsystem Hardware Design organization and partners closely with hardware, software, and customer engineering teams to diagnose and resolve critical display failures across multiple product areas, including mobile, automotive, compute, XR/VR, and IoT. Our work helps ensure customer issues are resolved quickly, software teams receive the support they need for their display driver development, and hardware designers get our feedback to roll in changes and fixes for future chips.

This role focuses on debugging complex display issues that may be SoC-related (e.g., RTL defects, register configuration/sequence issue), system-related (e.g., PCB signal integrity, third-party SerDes interactions), and/or software-related (e.g., HLOS behavior, driver sequencing, race conditions). You will help improve debug efficiency by building workflows and tools to analyze large volumes of system logs, register dumps, and hardware debug data. The team is investing heavily in AI-enabled approaches to accelerate analysis through historical-case learning and agentic automation. You will work in a multidisciplinary, multi-site environment alongside architects, designers, validation engineers, software engineers, and customer engineering teams to resolve high-priority issues with urgency and quality.

Qualifications

What you'll bring (required):

• Strong analytical skills and attention to detail, with the ability to triage and debug complex technical issues
• Strong written and verbal communication skills, including the ability to document findings and align cross-functional stakeholders
• Proficiency in C/C++ and Python for tool development, automation, and data analysis
• Solid understanding of digital logic and computer architecture fundamentals
• Comfort analyzing large datasets and logs using common analysis tools (e.g., Excel, scripting)
• System-level debugging experience (typical ranges: Engineer 2+ years; Senior Engineer 5+ years). Display subsystem experience is a plus.

Nice to have:

• System-level debug experience including board bring-up, high-speed signal integrity analysis, and SerDes-based links
• Experience with display interfaces (e.g., MIPI DSI, HDMI, DisplayPort) and related protocols
• Experience with relational databases (e.g., MySQL) for tracking issues, data mining, and/or analytics
• Experience using AI-assisted debugging/development tools or automation to accelerate root-cause analysis

What you'll do

• Debug and root-cause display subsystem issues spanning silicon, board/system interactions, and software/driver behavior
• Develop and maintain scripts/tools to accelerate analysis of OS logs, register dumps, and hardware debug data
• Partner with hardware, software, validation, and customer engineering teams to reproduce issues, align on hypotheses, and drive fixes to closure
• Document investigations clearly (symptoms, reproduction steps, root cause, and corrective actions) and communicate status to stakeholders
• Senior Engineer expectation: Lead cross-functional debug efforts end-to-end, mentor teammates, and help define scalable debug processes and best practices

Education

• Bachelor's degree in Computer Engineering, Electrical Engineering, Computer Science, or a related discipline
• Master's degree is preferred but not required