Senior RTL Design Engineer - PCIe Gen5
Avinika Solution · Bengaluru · onsite · Posted 30d ago
₹12.0L - ₹22.0L PA5–10 yrsfulltimeSourced from
About a minute. You'll make an account on the way through.
About this role
Responsibilities:
- Collaborate with cross-functional teams on SOC verification
- Ensure compliance with industry standards and customer requirements
- Lead RTL design projects from concept to delivery
Sourced from naukri
Skills
soc designVerilogSystem VerilogSOC VerificationASIC DesignRTL DesignCXLUCIePCIe Gen4PCIe Gen5