Senior Physical Design Engineer II

About the Company

Cadence Pune is seeking a Senior Physical Design Engineer II to join our team.

About the Role

Experience: 2-5 years

Responsibilities:

• Implement physical design of advanced Cadence IPs using Cadence EDA tools such as Genus, Innovus, Tempus, and Voltus.
• Characterize and optimize PPA for performance-oriented and power-oriented IP cores across advanced process nodes, including 7nm, 5nm, 3nm, and 2nm.
• Develop, automate, and maintain EDA flows and scripts for physical implementation.
• Manage regression infrastructure to track the quality of RTL/flow development and PPA of key designs.
• Participate in benchmarking PPAs for customer engagements.

Qualifications:

• Knowledge of complete ASIC Design Flow, including Synthesis, Physical Design, Timing Analysis, Power Analysis, and Formal Verification.
• Experience with Cadence digital design tools is a plus.
• Proficiency in scripting languages such as Python, Perl, TCL, and Unix shell.
• Strong understanding of digital logic design, processor design, and computer architecture is desirable.
• Excellent communication, analytical, and problem-solving skills.
• Self-motivated and a good team player.

Required Skills:

• Knowledge of complete ASIC Design Flow
• Experience with Cadence digital design tools
• Proficiency in scripting languages
• Strong understanding of digital logic design
• Excellent communication skills

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