Senior IP Verification Engineer (Memory/Ethernet VIP)

As a

Senior Verification Engineer , you will play a pivotal role in building and enhancing high-quality

Verification IP (VIP) for next-generation semiconductor designs. You will work on cutting-edge protocols and contribute to robust, reusable verification solutions used across complex SoC and IP environments. 🛠️

Key Responsibilities

• Design, develop, and maintain

high-performance Verification IP (VIP) for protocols such as

Memory and Ethernet

• Contribute to

IP and SoC-level verification environments , ensuring high quality and coverage

• Develop reusable verification components using

SystemVerilog/UVM methodologies

• Work on

testbench architecture, test development, debugging, and regression closure

• Drive

coverage-driven verification , assertions, and protocol compliance checks

• Collaborate with cross-functional teams including

design, architecture, and software teams

• Improve verification efficiency through

automation, scripting, and flow enhancements

• Stay aligned with evolving industry standards and contribute to

methodology improvements ✅

Required Qualifications 🎓

Education

• Bachelor’s or Master’s degree in

EEE / ECE / VLSI from a reputed engineering institute 💼

Experience

• 4+ years of strong experience in

design verification

• Prior exposure to

VIP development or EDA industry is a strong plus 🔌

Protocol Expertise Hands-on experience with

one or more protocols , such as:

• AMBA (AXI/AHB/APB)
• PCIe / PCI
• Ethernet
• SAS
• MIPI
• (Flexibility across protocols is welcomed) 🔍

Verification Expertise

• Strong experience in

IP and/or SoC verification

• Solid understanding of

verification planning, execution, and closure ⚙️

Methodologies & Tools Expertise in:

• SystemVerilog (SV) & UVM (mandatory)
• OVM / Specman (nice-to-have)
• TLM, Assertions, Coverage-driven verification
• Debugging complex verification environments
• Co-simulation / co-verification techniques 💻

Scripting & Automation

• Proficiency in

Python / Perl / Shell scripting for automation is a strong advantage ⭐

What Makes You Stand Out

• Experience with

Memory VIP (DDR/LPDDR/HBM, etc.) or Ethernet VIP

• Exposure to

VIP architecture, scalability, and reuse strategies

• Contributions to

methodology improvements or internal frameworks

• Experience in

EDA companies or product-based semiconductor firms 🌟

Why Join Us

• Work on

next-gen semiconductor technologies

• Be part of a

high-impact IP verification team

• Opportunity to grow into

technical leadership roles

• Collaborative and innovation-driven work environment