Senior Engineer

SystemC Engineer – Virtual Platforms

Experience: 0.6–4 Years

Location: Bangalore/Bengavi

Work Mode: Hybrid

Role Overview

We are looking for a SystemC Engineer to develop and enhance Virtual Platforms for next-generation embedded and semiconductor systems. You will work with hardware, firmware, and software teams to enable early software development and validation before hardware is available.

Key Responsibilities

• Develop C++/SystemC TLM 2.0 models for CPUs, peripherals, and SoC components.
• Build and optimize Virtual Platform models for accurate and efficient simulation.
• Work with hardware, firmware, and software teams to understand system specifications.
• Integrate SystemC models with QEMU, Synopsys Virtualizer, or similar simulators.
• Develop models for peripherals such as Timers, DMA, and I/O controllers.
• Support debugging, performance optimization, testing, and documentation.
• Contribute to Virtual Platform and semiconductor R&D initiatives.

Must-Have Skills

• Hands-on experience with SystemC and TLM 2.0.
• Strong C/C++ programming and OOP concepts.
• Exposure to embedded software/firmware development.
• Understanding of SoC architecture, CPU/GPU, hardware accelerators, and memory subsystems.
• Knowledge of bus protocols such as AXI, PCIe, or USB.
• Experience with peripheral modeling.

Good to Have

• Experience with QEMU, Synopsys Virtualizer, or equivalent simulators.
• Exposure to Virtual Platforms / Virtual Prototyping.
• Knowledge of hardware/software co-simulation.
• Familiarity with Verilog/SystemVerilog.
• Semiconductor, automotive, AI accelerator, or HPC domain exposure.

What You'll Gain

• Hands-on expertise in SystemC, TLM 2.0, and Virtual Prototyping.
• Exposure to cutting-edge semiconductor and embedded system technologies.
• Opportunity to work on next-generation platforms across Automotive, AI, and HPC domains.