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    Job · 19540778

    asictronix and techsoft pvt ltd logo

    Senior Analog Layout

    asictronix and techsoft pvt ltd · Bengaluru · onsite · Posted 23d ago

    Not disclosed7–10 yrsfulltimeSourced fromFoundit

    About a minute. You'll make an account on the way through.

    About this role

    Hi All,

    We are looking for an #Analog_Layout, #IC_Layout, #AMS_Layout Engineer, #immediately based in Bengaluru, with hybrid model. Responsibilities include the design and optimization of AMS, PMIC layouts, handling IP's independently and complete verification. Collaborating with cross-functional teams, you will review layout designs for compliances as per client requirements.

    Qualifications

    - Proficiency in Layout/mask design with an experience from 7-10 years.

    - Expert knowledge in Layout Design Techniques matching, clock routing and ESD compliance, as well as experience in Analog, Mixed-Signal Design processes.

    - Strong skills in debugging Parasitic Extraction, crosstalk, EMIR mitigation, and physical verification (DRC, LVS, PM & Signoff checks).

    - Experience with 16nm to 7nm FF technology nodes in submicron and deep-submicron processes.

    - Bachelor's or Master's degree in ECE, EEE & Diploma.

    Interested candidates please send resume to [HIDDEN TEXT].

    #analog_layout, #IC_Design, #AMS_Layout, #Analoglayout, #Senior_layout_design, #DRC, #LVS,

    #Finfet, #IC_Layout, #Mask_Layout

    Sourced from foundit

    Skills

    Layout Design TechniquesLayout mask design16nm to 7nm FF technology nodesAnalog Mixed-Signal Design processesCrosstalk EMIR mitigationDebugging Parasitic ExtractionPhysical verification DRC LVS PM Signoff checksSubmicron and deep-submicron processes

    Senior Analog Layout · waiting for your command