Semiconductor Design Engineer (SOC Design + Verification Engineer)

Location: Hyderabad
Experience: 3-7 Years
Email to Apply: [email removed]

Responsibilities:
• Develop SoC-level test plans and analyze coverage
• Build verification environments for complex SoCs
• Develop directed/random tests in RTL & GLS environments
• Review architectural specifications to ensure high quality
• Collaborate with customers to understand verification requirements
• Debug pre-silicon and post-silicon issues

Skills:
• B.Tech in Electrical Engineering or related field
• 3+ years in SoC/IP verification using SystemVerilog and UVM
• Experience writing assertions and coverage analysis
• Strong expertise with SoC simulation tools & advanced verification methodologies

Preferred candidate profile

Immediate joiners can send CV to [email removed]

Follow/connect me on linkedln: https://www.linkedin.com/in/aman-b056091b1/