Physical Design - Sr Engineer
Qualcomm · Chennai · onsite · Posted 57d ago
Undisclosed3–6 yrsfulltimeSourced from
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About this role
Company: Qualcomm India Private Limited
Job Summary - Physical Implementation activities for Sub systems which includes Floor-planning, Place and Route, CTS, Formal verification, Physical Verification (DRC/LVS), PDN, Timing Closure and power optimization.
- Should have good exposure to PD implementation of PPA critical Cores and making right PPA trade-off decisions.
- Knowledge in timing convergence of high frequency data-path intensive Cores and advanced STA concepts
- Well versed with the Block level PnR convergence with Synopsys ICC2/ Cadence Innovus and timing convergence in PTSI/Tempus in latest technology nodes
- Good understanding of clocking architecture.
- Should be able work in close collaboration with design, DFT and PNR teams and resolve issues wrt constraints validation, verification, STA, Physical design, etc.
- Well versed with Tcl/Perl Scripting
- Strong problem-solving skills and good communication skills.
- Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience.
- Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 1+ year of Hardware Engineering or related work experience.
- PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field.
- 3-6 years of experience in Physical Design/Implementation
Sourced from naukri
Skills
Scriptingformal verificationCadenceHardware Engineeringperl scriptingphysical designlvstiming closureInnovusPerlDFTElectronics EngineeringsynopsysCommunication SkillsArchitecturePhysical VerificationRest Assured
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Semiconductors
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