Physical Design Engineer

Requirements:

• 3-5 years hands-on experience of different PnR steps including Floorplanning, Power planning, Placement & Optimization, CTS, Routing, Static timing analysis, Post route optimization, ECO implementation and DRC closure
• Well versed with high frequency design & advanced tech node implementations
• In depth understanding of PG-Grid optimization, including identification of high vs low current density paths & layer/via optimization, Adaptive PDN experience
• In depth knowledge of custom clock tree including H-tree, SPINE, Multi-point CTS, Clock metrics optimization through tuning of CTS implementation.
• Well versed with tackling high placement density/congestion bottlenecks
• In depth knowledge of PnR tool knobs/recipes for PPA optimization
• Experience in automation using Perl/Python and tcl
• Good communication skills and ability & desire to work in a cross-site cross-functional team environment.

Education Requirements

• Required: Bachelor's, Electrical Engineering or equivalent experience