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    Job · 19121178

    Leadic Design logo

    PDK Engineer - DRC/SVRS

    Leadic Design · Noida · onsite · Posted 28d ago

    Not disclosed2–5 yrsfulltimeSourced fromFoundit

    About a minute. You'll make an account on the way through.

    About this role

    Location: Bengaluru/Noida/Hyderbad

    Experience: 2–5 Years

    Employment Type: Full-time

    Job Overview

    We are looking for a PDK Validation Engineer with 2–5 years of experience in PDK validation, physical verification, and DRC rule checking, with strong hands-on experience in Calibre and SVRF rule decks.

    The role involves validating and debugging PDK/technology collateral, DRC rule decks, and physical verification flows to ensure robust and accurate PDK releases for advanced semiconductor technologies.

    Key Responsibilities

    • Validate PDK releases and physical verification flows across semiconductor technologies.
    • Perform and debug DRC rule checks using Calibre.
    • Work extensively with SVRF rule decks for DRC validation and debugging.
    • Analyze DRC violations and determine whether issues originate from:
    • Design rules
    • SVRF rule decks
    • Technology files
    • PDK components
    • Layout/design implementation
    • Develop and execute DRC test cases to validate individual rules and rule-deck functionality.
    • Validate PDK/DRC rules across different process variants, configurations, and technology nodes.
    • Perform LVS/ERC and other physical verification checks as required.
    • Support regression testing and qualification of PDK releases.
    • Debug rule-deck issues and work with PDK, CAD, Technology, Foundry, and Design teams for resolution.
    • Maintain validation collateral, test cases, scripts, and regression suites.
    • Automate validation and regression activities using Python, Tcl, Perl, SKILL, or Shell.
    • Document issues, validation results, and release qualification status.

    Must-Have Skills

    • 2–5 years of relevant semiconductor experience.
    • Hands-on experience in PDK Validation / Physical Verification / Design Enablement.
    • Strong hands-on experience with Calibre DRC.
    • Good understanding and hands-on exposure to SVRF rule decks — Mandatory.
    • Experience in DRC rule checking, debugging and validation.
    • Understanding of CMOS layout and semiconductor design rules.
    • Exposure to LVS/ERC validation.
    • Experience with Linux/Unix environments.
    • Scripting experience in Tcl / Python / Perl / SKILL / Shell.

    Good to Have

    • Experience in PDK development or qualification.
    • Experience with SVRF rule-deck development/modification.
    • PCell and technology-file exposure.
    • Calibre LVS/PEX.
    • Synopsys ICV/PVS exposure.
    • Advanced-node experience such as FinFET/RibbonFET.
    • Experience with PDK regression automation.
    • Exposure to foundry PDK releases and technology enablement.

    Sourced from foundit

    Skills

    DRC rule checkingPDK validationSVRF rule deckslvstclCalibreshellPerlUnixERCPythonPhysical VerificationLinux

    PDK Engineer - DRC/SVRS · waiting for your command