PCIe / CXL Validation Engineer - Sr. Staff

Company Qualcomm India Private Limited

Job Area Engineering Group, Engineering Group > Hardware Engineering

General Summary As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next-generation experiences and drives digital transformation to help create a smarter, connected future for all. As a Qualcomm Hardware Engineer, you will plan, design, optimize, verify, and test electronic systems, bring-up yield, circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems that launch cutting-edge, world class products. Qualcomm Hardware Engineers collaborate with cross-functional teams to develop solutions and meet performance requirements.

Minimum Qualifications

• Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 6+ years of Hardware Engineering or related work experience. OR Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 5+ years of Hardware Engineering or related work experience. OR PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 4+ years of Hardware Engineering or related work experience.

Role Summary Lead and own end‑to‑end validation of PCIe (Gen4/Gen5/Gen6/Gen7) and CXL (2.x/3.x) subsystems across pre‑silicon and post‑silicon platforms for server‑class SoCs. Drive validation strategy, execution, debug, and cross‑functional alignment to ensure high‑quality, on‑schedule delivery.

Key Responsibilities

• Define and own validation strategy, test plans, and coverage for PCIe/CXL controllers, PHY, and system‑level use cases.
• Lead pre‑silicon (RUMI, Veloce, FPGA) and post‑silicon bring‑up and validation activities.
• Validate protocol compliance, performance, reliability, power management (ASPM, L1SS, LTR), and advanced features including P2P, IDE/DOE, error handling, and reset flows.
• Drive complex root‑cause analysis using protocol analyzers (e.g., LeCroy), and silicon debug.
• Partner closely with architecture, Design, PHY, software, platform, and power teams to root-cause and resolve issues.
• Provide technical leadership and mentorship to validation engineers..

Required Skills & Experience

• Candidate needs 12 to 15 years of experience of relevant experience (A Must).
• Strong expertise in PCIe and CXL architecture, protocol, and system integration.
• Hands‑on experience with server platforms, analyzers, emulation platforms, and SoC bring‑up.
• Proven ability to lead cross‑functional debug and deliver under aggressive schedules.
• Excellent technical communication and stakeholder‑management skills.

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