MTS Logic Design & Verification

MTS Logic Design & Verification

Own the logic design and verification intelligence that enables agents to take hardware from intent to a verified, working implementation. This role sits at the intersection of hardware engineering and frontier AI, translating expert reasoning across the design lifecycle into reusable capabilities that agents can apply. 

You'll build systems that let agents translate requirements into architecture and synthesizable RTL; integrate compute, memory, interconnect, high-speed I/O, and data-processing IP across communications, intelligent-edge, and control applications; and close the loop through simulation, lint/formal, assertions, coverage, prototyping, hardware bring-up, performance analysis, and debug. You'll connect RTL with firmware, drivers, and host or embedded software while turning project and customer learning into scalable agentic AI capabilities. 

You bring hands-on experience in logic design and verification; a BS/MS in EE, EECS, CS, or a related field; and a strong background in RTL architecture, FPGA/ASIC/SoC development flows, and IP integration. You have practical Verilog/SystemVerilog experience spanning simulation, assertions, coverage, formal verification, and debug; working proficiency in Python; and an interest in applying agentic AI to complex hardware development.