Memory Circuit Design Architect

Memory Circuit Design Architect

Location: Bengaluru

Experience: 10–16 Years

Role Overview

We are looking for a Memory Circuit Design Architect with deep expertise in SRAM Memory circuit design and architecture to drive next-generation memory solutions for high-performance SoC products.

The role requires strong hands-on expertise in transistor-level circuit design, memory architecture, advanced-node challenges, PPA optimization, and silicon correlation.

Key Responsibilities

• Architect and develop high-performance, low-power SRAM /MRAM Memory macros.
• Own circuit design across bitcell, sense amplifier, write/read paths, precharge, decoders, wordline drivers and I/O.
• Drive PPA, timing, leakage, stability and Vmin optimization across PVT and process corners.
• Perform Monte Carlo, mismatch, variation and reliability analysis.
• Define memory architecture including banking, muxing, redundancy and memory configurations.
• Drive advanced-node memory design for FinFET / GAA technologies.
• Lead silicon correlation, characterization and root-cause analysis of memory issues.
• Partner with Layout, Process, CAD, DFT/MBIST, STA and Silicon teams to deliver production-quality memory IP.
• Develop design/characterization automation using Python, Perl, Tcl or SKILL.

Required Skills

• 10–16 years of relevant Memory Circuit Design experience.
• Strong hands-on experience in SRAM / MRAM Memory design.
• Deep understanding of CMOS circuit design and memory architecture.
• Expertise in SRAM bitcells, sense amplifiers, read/write circuits and peripheral circuitry.
• Strong knowledge of SNM, read/write margins, Vmin, leakage and memory timing.
• Experience with PVT, Monte Carlo and variation analysis.
• Strong exposure to advanced-node semiconductor technologies.
• Hands-on experience with Cadence Virtuoso, Spectre / HSPICE or equivalent tools.
• Strong problem-solving skills with the ability to drive designs from architecture through silicon.

Preferred

• Experience with high-performance CPU/GPU/AI/Networking SoCs.
• Exposure to memory compiler, redundancy/repair and MBIST.
• Experience with FinFET / GAA technologies and low-voltage memory design.
• Strong silicon bring-up and characterization experience.

Education: B.E./B.Tech/M.E./M.Tech in Electrical Engineering, Electronics, VLSI, Microelectronics or related discipline.