BENGALURU · FULLTIME
Lead RTL Engineer - System Verilog
Taglynk Careers
Bengaluru · onsite · Posted 14d ago
Sourced from
Not disclosed7–10 yrsfulltimeBengaluru
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Section · 01
About this role
Lead RTL Engineer - System Verilog
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Section · 02
Skills
System VerilogRTL Designtiming closuresynthesisReact Testing Library