Lead/Manager/Director - STA
Embedded Ai Design Labs · Bengaluru · onsite · Posted 29d ago
₹60.0L - ₹60.0L PA10–20 yrsfulltimeSourced from
About a minute. You'll make an account on the way through.
About this role
Lead STA | 8 - 15 Yrs: Lead STA/timing closure for ASIC/SoC. Expertise in SDC, MCMM, OCV/AOCV/POCV, setup/hold, CTS, SI, ECO, PrimeTime/Tempus, Tcl/Python and signoff timing.
Experience in 7nm/5nm/4nm/3nm/2nm, AI accelerators, CPU/GPU/NPU
Sourced from naukri
Skills
OCV/AOCV/POCVECO and Signoff for complex ASIC/SoC designsSetup/HoldSI-aware STAStatic Timing AnalysisCTStiming closureEnglishSDCMCMM