Job opportunity on Physical Verification/ LV Engineer/ Bengaluru/ Full Time
Headway Tek Inc · Bengaluru · onsite · Posted 53d ago
Not disclosed3–5 yrsfulltimeSourced from
About a minute. You'll make an account on the way through.
About this role
Opportunity with Headway Tek on Physical Verification/ LV Engineer/ 3-5 Yrs/ (On-Site) Bengaluru/ Full Time.
Physical Verification/LV Engineer
Experience: 3 to 5 Years
Location: Bengaluru
Qualifications: Bachelor's or Master's degree in Electrical Engineering.
Key Requirements:
- 3+ years of experience in VLSI layout verification / physical verification.
- Hands-on experience in DRC, LVS, ERC, antenna, and density checks.
- Strong expertise in Siemens Calibre or equivalent physical verification tools.
- Experience debugging LVS shorts, opens, device mismatches, connectivity issues, and rule violations.
- Good understanding of CMOS layout, device extraction, and foundry design rules.
- Scripting experience in Perl/Python/Shell/TCL.
- Experience supporting block/IP-level signoff and tape-out milestones.
Sourced from foundit
Skills
Density checksCMOS layoutdebugging LVS shortsdevice extractionVLSI layout verificationlvstclDRCshellPerlERCPythonSiemens CalibreFoundry design rulesPhysical Verification