Ip Verification Engineer - PCIe

Role & responsibilities

Job Qualifications
At least 3-6 years of relevant experience in PCIe verification.
Strong and relevant expertise with ASIC simulation tools and advanced verification methods.
Expert level in verification languages such as UVM and System Verilog.
Relevant experience with writing block-level .

Education: B.S. in electrical engineering, computer science with extensive industry experience.

Skills Required:
IP/Block/Subsystem Verification (RTL Front end verification) - minimum 5 years
SV, UVM Verification - minimum 4 Years
Interfaces (AXI/AHB) - minimum 2 years
Protocols (DDR/Onfi/PCIE/NVMe) - minimum 2 years
Scripting (Perl/Python) - Optional