IO Layout Engineer

Company: Insemi Technologies – An Infosys Company

Location: Bangalore

Experience: 2+ Years

Employment Type: Full-time

Insemi Technologies, an Infosys company, specializes in semiconductor engineering services, delivering solutions across VLSI design, physical design, verification, and semiconductor IP development.

We are looking for experienced IO Layout (GPIO) Engineers to work on custom layout design and physical implementation of GPIO and I/O library cells for semiconductor technologies.

• Develop custom layouts for GPIO, I/O cells, and related analog/mixed-signal blocks.
• Perform transistor-level layout, floorplanning, placement, routing, and optimization.
• Ensure compliance with DRC, LVS, ERC, and physical verification requirements.
• Handle ESD-related layout requirements, latch-up prevention, guard rings, and well/substrate contacts.
• Optimize layouts for area, parasitics, performance, and reliability.
• Collaborate with circuit design and verification teams to resolve layout issues.
• Support physical verification, debugging, and sign-off activities.

• 3+ years of hands-on experience in Custom Layout / IO Layout.
• Strong experience in GPIO, I/O cells, or I/O library layout.
• Good understanding of CMOS layout fundamentals and semiconductor process technologies.
• Hands-on experience with Cadence Virtuoso and physical verification tools.
• Knowledge of DRC, LVS, ERC, and PDK requirements.
• Experience in lower technology nodes is preferred.

• Bachelor's degree in Engineering (BE/BTech) in Electronics, Electrical, ECE, EEE, or a related discipline.

Interested candidates can apply or share their updated resumes.

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