Hardware Design Engineer 3

Urgent Hiring!!!

Greetings from Sunrise Biztech Systems Pvt. Ltd.

We are hiring for one of our reputed clients for the following position. If you're interested and your experience matches the requirement, we'd love to hear from you.

Position: Hardware Design Engineer 3
Experience: 5-7 Years

Location: Hyderabad

Contract Tenure : 9 months

Job Title: PnR Design Engineer

Job Summary

We are seeking experienced PnR Design Engineers to join our Physical Design team in Hyderabad. The role involves supporting and enhancing Place & Route (PnR) workflows for advanced semiconductor technology nodes, including 6nm, 3nm, and 2nm. The ideal candidate will have strong expertise in physical design implementation, flow development, automation, and design optimization using industry-standard EDA tools.

Key Responsibilities

• Support and maintain Place & Route (PnR) workflows for advanced technology nodes (6nm, 3nm, and 2nm).
• Qualify new EDA tool versions and deploy new PnR features into production workflows.
• Update and optimize design flows to incorporate new capabilities and improve efficiency.
• Perform PnR flow qualification and provide implementation support across multiple design projects.
• Execute multiple PnR benchmark blocks to evaluate performance, power, and area (PPA).
• Drive PPA optimization and ensure strong design correlation with STA, EMIR, and Physical Design Verification (PDV) signoff flows.
• Collaborate with cross-functional teams to resolve implementation challenges and improve design methodologies.

Required Skills

• Strong experience with Place & Route (PnR) implementation and physical design methodologies.
• Hands-on experience with Synopsys Fusion Compiler, Cadence Innovus, and Cerebrus.
• Solid understanding of low-power design flows.
• Proficiency in scripting using Perl, Tcl, and Python.
• Experience with Synthesis, Place & Route workflows, Static Timing Analysis (STA), and Physical Verification.
• Strong debugging, analytical, and problem-solving skills.

Preferred Qualifications

• Experience working on advanced technology nodes such as 6nm, 3nm, or 2nm.
• Familiarity with EMIR analysis, PDV signoff flows, and timing closure methodologies.
• Experience in EDA tool qualification, flow automation, and methodology development.