Functional Verification Engineer

Project Role : Functional Verification Engineer


Project Role Description : Develop and execute testbenches to verify the functional correctness of digital designs at the block and system level. Create constrained-random, directed, and coverage-driven tests using languages like SystemVerilog and UVM. Collaborate with design and architecture teams to identify corner cases and ensure complete functional coverage before tape-out.


Must have skills : SoC Verification


Good to have skills : NA
Minimum
5 year(s) of experience is required


Educational Qualification : 15 years full time education


Summary:
As a Functional Verification Engineer, a typical day involves developing and executing comprehensive testbenches to ensure the functional accuracy of digital designs at both block and system levels. The role includes creating various types of tests, such as constrained-random, directed, and coverage-driven, to thoroughly validate the design. Collaboration with design and architecture teams is a key part of the day, focusing on identifying edge cases and ensuring that all functional aspects are covered before the final tape-out stage. This position requires a proactive approach to problem-solving and continuous communication across multiple teams to maintain design integrity throughout the verification process.


Roles Responsibilities:

Expected to be an SME, collaborate and manage the team to perform.

Responsible for team decisions.

Engage with multiple teams and contribute on key decisions.

Provide solutions to problems for their immediate team and across multiple teams.

Lead efforts to improve verification methodologies and processes to enhance efficiency and coverage.

Mentor junior team members to support their professional growth and skill development.

Coordinate with cross-functional teams to align verification goals with overall project timelines and deliverables.


Professional Technical Skills:

PCIe Subsystem/SoC DV

Ethernet/Networking SoC DV

Embedded C

Firmware validation

Xcelium + UVM

Driver/Firmware experience

Debug HW/SW interactions

Debug transactors

Connect DUT interfaces to software side


Must To Have Skills:

Proficiency in SoC Verification.

Strong knowledge of verification methodologies including constrained-random testing and coverage-driven verification.

The candidate should have minimum 5 years of experience in SoC Verification.

This position is based at our Bengaluru office.

A 15 years full time education is required.


Qualification 15 years full time education