Fpga Design Engineer

Senior FPGA Modeling Engineer

The ACE Hardware and FPGA design team is looking for a highly motivated FPGA Modelling Engineer.  This individual will be responsible for creating FPGA based models of ARM and DSP based SOCs and complex intelligent Automotive Audio Bus ASICs. This position requires a deep understanding of FPGA Design and programming with Verilog, VHDL and RTL. The ability to perform complex system level debugging is essential. The challenges include modelling very large and high speed (30 million+ gates, 1 GHz plus) SOCs and very fast (200+ MHz) ASICs. A solid understanding of FPGA structures and timing closure techniques are critical to this role.  This individual must have the ability to write real time embedded device driver Test software required to verify the FPGA models.  This position requires working closely with members of Chip, Verification, Hardware, Software and Applications teams.  Strong verbal and written communication skills are essential. 

Requirements:

8+ years of FPGA experience

Expertise in RTL, preferably Verilog

Expertise in timing closure and memory modelling

Experience in script writing (Python preferred)

Proficient in C/C++

Experience in FPGA modelling a plus