EM/IR Engineer

Company

Qualcomm India Private Limited

Job Area

Engineering Group, Engineering Group > Hardware Engineering

General Summary

As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next-generation experiences and drives digital transformation to help create a smarter, connected future for all. As a Qualcomm Hardware Engineer, you will plan, design, optimize, verify, and test electronic systems, bring-up yield, circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems that launch cutting-edge, world class products. Qualcomm Hardware Engineers collaborate with cross-functional teams to develop solutions and meet performance requirements.

Minimum Qualifications

• Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 6+ years of Hardware Engineering or related work experience.
  
  

OR

Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 5+ years of Hardware Engineering or related work experience.

OR

PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 4+ years of Hardware Engineering or related work experience.

• EMIR Signoff: Perform static and dynamic IR drop analysis, electromigration (EM) checks, and power grid optimization for complex SoCs. Perform power estimation runs using Primepower. Provide regular update to Team lead on EMIR status of design through detailed dashboard.
• Debugging & Troubleshooting: Analyze and resolve issues arising due to EMIR simulation setup and tool related issues. Suggest update to flows as and when necessary for new features and new tech nodes and for design corner cases.
• Automation & Scripting: Write and maintain automated scripts using Python, Tcl, or Perl to parse results, build dashboards, and streamline signoff flows.
• Cross-Functional Work: Partner with physical design, static timing analysis (STA), and packaging teams to clear layout bottlenecks, suggest fixes and run trials.
• EDA Collaboration: Work with electronic design automation (EDA) vendors to test tool flows, qualify new features, debug issues and drive robust solutions.
• Minimum Qualifications
• Education: Bachelor's or Master's degree in Electrical Engineering, Electronics, VLSI, or a related field.
• Experience: 5+ years of hardware engineering experience focusing on physical design signoff, power integrity, or IR/EM analysis.
• Tool Knowledge: Hands-on experience with Ansys RedHawk, Cadence Voltus and Primepower.
• Technical Skills: Strong knowledge in EMIR fundamentals, Strong foundation in physical design flows (floorplanning, routing, extraction) alongside robust scripting in Python or Tcl.
  
  

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