DV Methodology Engineer

Silicon Design Engineer

Advance your career. Advance the world.

At AMD, we believe technology has the power to solve the world s most important challenges. From advancing healthcare and scientific discovery to powering AI and the technologies people rely on every day, innovation at AMD is shaping the future.

Whether you re designing next-gen processors, enabling AI breakthroughs, or bringing leading edge products to market, every role at AMD contributes to something bigger - technology that moves the world forward. Join us and, together, we ll advance your career.

The AMD Radeon Technology Group (RTG) develops GPU ASIC design that enhances our daily lives as we are entering an age of immersive computing. The RTG hardware engineering teams are distributed across Canada, US, China and India. The team in India is engaging on the enthusiast and high performance GPUs. As part of the RTG Design Verification Infrastructure and Architecture team, your team will be responsible for scoping out and managing the testbench environment that is used for developing the design as well as verifying the design features. This is built up from basics like how work spaces are setup, how IPs are integrated and interacted in a System-On-Chip environment, how the tools/flows are developed to automate processes, and how tests are written and regressed. As always, the team is dedicated to come up with innovative solution to overcome new challenges related to specific project requirements and time-to-market.

Key Responsibilities

• Will work with various IP SOC teams across all our sites (GFX, Memory controller, Multimedia engines, IOs, PCIE ) to understand the test bench and DV infrastructure needs and work with the Infra leads in India and North America to implement them.
• Will help scoping out the testbench architecture and the simulation configuration
• Will help in development of fast initialization sequence for the SOC
• Will help supporting scripts related to managing the track resources
• Will help supporting test regression flows (perl/mysql/PHP) to support our project development
• Will help debugging and enhancing simulation testcases and models
• Will help to review new tools and options to improve simulation performance (new flows, tracking, analyzing reports, recoding, benchmarking, ) with the 3rd party vendor
• May help supporting some simulation debug and verilog/system verilog coding
• May help to support some gate level simulation debug

Skills and Experience Requirements

• B.E/B.Tech/M.E/M.Tech in Computer Science/Electrical/Electronic Engineering
• BE/B.Tech with 3+ years of experience or M.Tech with 1+ years of experience in Infrastructure development with SOCs or IPs verification
• Good C/C++ software skills, UVM and Verilog
• Good understanding for digital system and computer organization
• Should be a confident coder and be comfortable debugging general hardware/software problems.
• Must communicate well both written and orally
• Must be organized and multitask well

What You Will Learn

You will gain valuable experience in different aspects of ASIC design verification. Depends on the time you join the team, you may be able to experience the full project cycle - from project planning to implementation to tapeout.

This team is essential to the success of AMD as a growing company. It is a very exciting environment and you will be working with the very best in our technology. You will be working on some of the most exciting projects the industry has to offer.

Disclaimer: This job posting has been aggregated from external source. Role details, content, and availability are subject to change. Applicants are advised to confirm the latest information directly on the company website before applying.