DV-Lead Engineer
Questa Global · Bengaluru · onsite · Posted 47d ago
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About this role
Job Requirements
At Quest Global, it's not just what we do but how and why we do it that makes us different. With over 25 years as an engineering services provider, we believe in the power of doing things differently to make the impossible possible. Our people are driven by the desire to make the world a better place—to make a positive difference that contributes to a brighter future. We bring together technologies and industries, alongside the contributions of diverse individuals who are empowered by an intentional workplace culture, to solve problems better and faster.
Key Responsibilities
We wholeheartedly believe in the diversity of thought that comes with fostering a culture rooted in respect, where everyone belongs, is valued, and feels inspired to share their ideas. We know embracing our unique differences makes us better, and that solving the worlds hardest engineering problems requires diverse ideas, perspectives, and backgrounds. We shine the brightest when we tap into the many dimensions that thrive across over 21,000 difference-makers in our workplace.
At Quest Global, it's not just what we do but how and why we do it that makes us different. With over 25 years as an engineering services provider, we believe in the power of doing things differently to make the impossible possible. Our people are driven by the desire to make the world a better place—to make a positive difference that contributes to a brighter future. We bring together technologies and industries, alongside the contributions of diverse individuals who are empowered by an intentional workplace culture, to solve problems better and faster.
Key Responsibilities
- Develop and execute comprehensive verification plans for IP, subsystem, and SoC-level designs.
- Build and maintain reusable UVM/SystemVerilog-based verification environments.
- Develop testcases, stimulus generators, checkers, scoreboards, and coverage models.
- Perform functional, code, assertion, and toggle coverage closure.
- Create and debug SystemVerilog Assertions (SVA) for protocol and design checking.
- Collaborate closely with RTL designers, architects, and validation teams to resolve design issues.
- Analyze simulation results, identify root causes, and drive bug closure.
- Verify industry-standard protocols such as AXI, AHB, APB, PCIe, USB, Ethernet, DDR, MIPI, or similar.
- Perform block-level, subsystem-level, and SoC-level verification.
- Participate in regression management and verification sign-off activities.
- Contribute to methodology improvements and reusable verification IP (VIP) development.
- Support emulation/FPGA-based verification where applicable.
We wholeheartedly believe in the diversity of thought that comes with fostering a culture rooted in respect, where everyone belongs, is valued, and feels inspired to share their ideas. We know embracing our unique differences makes us better, and that solving the worlds hardest engineering problems requires diverse ideas, perspectives, and backgrounds. We shine the brightest when we tap into the many dimensions that thrive across over 21,000 difference-makers in our workplace.
Sourced from foundit
Skills
DdrUSBEthernetUVMSystem VerilogPCIEAxiahbapbMIPI
About Questa Global

Questa Global
Recruitment
11-50
employees
2010
16 years old
Gurgaon
India
₹10.6L PA avg
Avg at Questa Global
About
Questa Global provides comprehensive business management solutions, leveraging extensive industry experience to enhance human capital services and organizational performance.
Industries
Recruitment
Employee ratings
10 reviews
4.0/ 5
Culture
3.9
Career growth
3.1
Work-life
3.5
Employees rate it well for
Company Culture43Work-Life Balance42
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