DV Engineer (MIPI, DDR )

Job Title: DV Engineer (MIPI, DDR ) - 6-7 Yrs

Location: Hyderabad

No. Of positions: 1

Work Mode: Onsite(All 5days)

Experience required: 6+ years

Interview Mode:

Round of interviews: 2
R1: Virtual
R2: F2F/Virtual

Mandatory Skills:

• 6+ years of hands-on experience in Functional Verification.
• Strong expertise in System Verilog and UVM.

Required Skills

• 6+ years of hands-on experience in Functional Verification.
• Strong expertise in System Verilog and UVM.
• Experience with functional coverage, assertions (SVA), and coverage-driven verification.
• Strong debugging and problem-solving skills.

• Experience with MIPI, DDR4/5 protocols, AMBA protocols such as AXI4, AXI4-Lite, and AXI4-Stream.
• Familiarity with VIP-based verification environments.
• Exposure to FPGA/Vivado-based IP verification flows
• Experience with industry-standard simulators such as Questa or VCS.