DFX Verification Engineer
Altera · Bengaluru · onsite · Posted 33d ago
Not disclosed5–7 yrsfulltimeSourced from
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About this role
Job Details
Job Description:
As a Design Verification Engineer, you will be responsible for Design for Debug architecture verification related tasks including creating test cases and test bench using UVM methodology. Capacity could include full chip and/or system functional verification with defining verification strategies, methodology and test plan to enable effective verification. Coordinate cross functional efforts with Design, SW, Architecture team to achieve full coverage verification plan. Using system full application to verify performance and identify short falls.
Responsibility
Regular
Shift
Shift 1 (India)
Primary Location:
Bengaluru, Karnataka, India
Additional Locations:
Posting Statement
All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.
Job Description:
As a Design Verification Engineer, you will be responsible for Design for Debug architecture verification related tasks including creating test cases and test bench using UVM methodology. Capacity could include full chip and/or system functional verification with defining verification strategies, methodology and test plan to enable effective verification. Coordinate cross functional efforts with Design, SW, Architecture team to achieve full coverage verification plan. Using system full application to verify performance and identify short falls.
Responsibility
- Pre-silicon system verification. This include SoC, FPGA & Full Chip design verification.
- Create testcase and testbench with UVM methodology
- Fullchip/system functional verification, by defining verification strategies/methodology and test plan to enable effective verification
- Coordinate/interface cross functional efforts with Design, SW, Architecture team to achieve full coverage verification plan
- Experience on Emulation will be an add on.
- 5+ years of experience with complex ASIC designs and/or verification
- Familiar with System Verilog language
- Experience on UVM verification methodology, and formal verification method
- Working knowledge of scripting in Linux/ Unix environments as well as proficiency in Perl and or Python is desirable.
- Experience with Design for Debug (JTAG, High speed USB, PCIe based debug, Visualization of Internal Signal) architecture and design verification of same.
- Experience with ARM and RISC Debug Architectures is desired with focus on design verification.
- Any prior working experience on UltraSoC/ Tessent Embedded Analytics Debug Architecture will be a plus but not must for this position.
- Strong communication skills and the ability to work with a team spread across different geography sites
- Flexible in dynamic environment
Regular
Shift
Shift 1 (India)
Primary Location:
Bengaluru, Karnataka, India
Additional Locations:
Posting Statement
All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.
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Skills
PerlSystem VerilogJTAGPCIEUVM methodologyDesign for DebugHigh speed USBTessent Embedded AnalyticsUltraSoCRISC Debug ArchitecturesPythonscripting in Linux Unix environments
About Altera
Altera
Atlanta
US
About
Altera is a private markets investment firm focused on delivering lower middle-market investment opportunities to wealth clients. Altera Private is an alternative investment firm that provides net-worth individuals, family offices, and financial advisors access to lower middle-market private investments, offering diversified opportunities across private equity, credit, and other asset classes.
Industries
Financial ServicesInformation TechnologyInfrastructure