DFX Verification Engineer
Tessolve · Not specified · onsite · Posted 58d ago
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About this role
🔍 Role: DFX Engineer 📍 Locations: Bengaluru | Chennai | Hyderabad | Noida 🧑 💻 Experience: 4–15 Years ⏳ Notice Period: Immediate to 30 Days Key Responsibilities : Develop and execute verification plans for DFx features including: Scan (stuck-at, transition fault) MBIST / LBIST Boundary Scan (JTAG) Memory repair and redundancy Low-power test scenarios Create and maintain testbenches using SystemVerilog/UVM for DFx validation Verify: Scan chain integrity and connectivity Test mode functionality and coverage ATPG pattern validation and debug BIST controllers and memory test logic
#Technical Skills : Strong knowledge of: DFT concepts (Scan, ATPG, MBIST, JTAG) Digital design fundamentals Expertise in: SystemVerilog and UVM Simulation tools (VCS, Xcelium, Questa) Familiarity with: ATPG tools (TetraMAX, Modus, FastScan) Debug tools (Verdi, DVE) Understanding of: Low-power design (UPF/CPF) Clocking and reset strategies 📩 Interested? Apply now! Send your resume to:
[email removed]
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About Tessolve

Tessolve
Semiconductors
2.5k+
employees
2004
22 years old
Bangalore/Bengaluru, Karnataka
India
₹10.6L PA avg
Avg at Tessolve
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