DFT Staff Engineer, "DFT Engineer", DFT Architect, DFT Design Engineer

DFT Staff Engineer – Semiconductor/VLSI

Experience: 8–12 Years
Locations: Bangalore & Hyderabad
Notice Period: Immediate to 15 Days

We are looking for an experienced DFT Engineer/Staff Engineer with strong hands-on experience in end-to-end Design for Test (DFT) implementation for ASIC/SoC designs.

Mandatory Skills:

• Strong hands-on experience in DFT implementation

• Scan insertion, scan stitching and scan compression

• ATPG pattern generation and simulation

• Fault coverage analysis and improvement

• DFT debugging and DFT verification

• DFT signoff experience

• Experience with MBIST/LBIST

• JTAG/Boundary Scan

• Good understanding of RTL and SoC design flow

• DFT timing constraints and STA

• Hands-on experience with any of the following DFT tools: Siemens Tessent, Synopsys TestMAX or Cadence Modus

• Strong scripting experience in TCL; Python/Perl is an added advantage

Preferred Profile:
Candidates with end-to-end DFT experience covering architecture, implementation, ATPG, coverage analysis, debugging, verification and signoff for complex ASIC/SoC designs will be preferred.